Here are some Technical Hardware specification of the main micro processor Amlogic AML8726-M.
General DescriptionAML8726‐M device is designed for the connected MID, tablet, STB, and TV applications. It integrates a power CPU, a 2D/3D graphics subsystem and a state‐of‐the arts video decoding engine with all major peripherals to form the ultimate multimedia SoC.
The application processor is an ARM Cortex‐A9 CPU with L1 instruction and data cache and a large L2 unified cache to improve system performance. In addition, the Cortex‐A9 CPU includes the NEON SIMD co‐processor to improve software media processing capability.
The ARM Cortex‐A9 CPU can run up to 1GHz and has a wide bus connecting to the memory sub‐system.
The graphics subsystem consists of two graphic engines and a flexible video/graphics output pipeline. The ARM Mali‐400 GPU handles all the OpenGL ES 2.0 and OpenVG graphics programs, while the 2.5D graphics Engine handles additional scaling, alpha, rotation and color space conversion operations. The video output pipeline can perform advanced image correction and enhancements. Together, the CPU and GPU handle all operating system, networking,user‐interface and gaming related tasks.
Three additional processors offload the Cortex‐A9 CPU by handling all audio and video decoding processing – the MediaCPU and two MediaDSPs. The audio optimized MediaCPU is available for audio decoding to off‐load computation tasks from the ARM Cortex‐A9 CPU.
The video decoder sub‐system can decode all HD video formats.H.264, RealVideo, MPEG 1/2/4, VC‐1/WMV and JPEG/MJPEG streams are processed by dedicated hardware together with the flexible dual MediaDSP engines. In addition to video decoding, the video decoding engine is also capable of decoding JPEG pictures with no size limitation.
A crypto‐processor accompanies the CPU and media decoding engines to handle encrypted traffic and media streams. The cryptographic processor provides hardware based random number generator and supports DES, 3DES, AES and DVB‐DS standards.
The SoC integrates many advanced peripherals inside including 10/100 Ethernet MAC; 3Gbps SATA and dual USB highspeed ports; multi‐standards card controller and transport‐demux processor. The flexible and programmable QoSbased switch fabric and memory controller tie all the processing cores and peripherals together and connects to the DDR2 memory bus. The build‐in videoDAC and HDMI transmitter supports external TV connections while the internal RGB digital output and LCD timing controller supports LCD panel.
DTV broadcasting streams can be received by the dual transport stream (TS) interfaces. Both serial SPI and parallel SPI are supported. The received streams can be saved in external storage devices for PVR applications. DVB Common Descrambler 1.0 is supported in addition to DES, Triple DES (TDES/3DES) and AES streaming crypto formats. An integrated ISO7816 controller is included for interfacing to external smart card.
The AML8726‐M SoC supports industrial standard Linux and Android operating system. Standard development environment utilizing gcc tool chain is supported.
Technical Information PDF: http://download1079.mediafire.com/mti2h0y5vsng/sokn55508l13nwa/AML8726-M_QRM+V1.0-IDER.pdfMirror:
http://www.multiupload.com/U3KKJM3KYJCPU Sub‐system• ARM Cortex A9 CPU, up to 1GHz frequency
• Supports ARMv7 ISA with Thumb‐2 technology
• 2.5 DMIPS/MHz
• Multi‐issue superscalar, out‐of‐order design
• 32KB instruction cache, 32KB data cache
• Unified 128KB L2 cache
• Memory Management Unit and TrustZone security
• Advanced NEON SIMD media accelerator
• Supporting Linux and Android operating system
3D Graphics Processing Unit• ARM Mali‐400 3D GPU
• 250Mpix/sec and 25Mtri/sec
• Full scene over‐sampled 4X anti‐aliasing engine with no additional bandwidth usage
• GPU‐L2 cache for reduction of graphics data bandwidth
• GPU‐Memory Management Unit
• Independent and concurrent GPU and CPU processing
• OpenGL ES 1.1/2.0 and OpenVG 1.1 software driver
2.5D Graphics Processor• Fast bitblt engine with dual inputs and single output
• Programmable raster (ROP) and alpha (AOP) operations
• Programmable polyphase scaling filter
• Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics
layer)
• Fast color space conversion
• Advanced anti‐flickering filter
RGB Output and TCON• RGB888 for digital LCD panels;
• Three independent Gamma table for LCD panel tuning
• Dithering logic for mapping to different LCD panel color depth
• Integrated programmable timing controller (TCON) for digital LCD panels
Accelerated Video/Picture Decoding Hardware• Dual programmable DSP engines at 200MHx with DSP instructions and direct video deocding hardware
interfaces
• MPEG‐1 MP/HL conforming to ISO‐11172 (1080P)
• MPEG‐2 MP/HL conforming to ISO‐13818 (1080P)
• MPEG‐4 Part 2 ASP ISO‐14496‐2 (1080P)
• WMV/VC‐1 SP/MP/AP (1080P, progressive/interlace frame picture)
• H.264
[email protected] (1080P)
• RealVideo 8/9/10 Decoding (720p)
• M‐JPEG and JPEG decoding ISO/IEC‐10918 – Unlimited pixel resolution (currently test with 16M pixel digital camera and 100M pixel Photoshop file)
• Supports JPEG thumbnail, scaling, rotation and transition effects
• Multiple language and multiple format sub‐title video support
• Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats
Video Post‐Processing Controller• Motive adaptive 3D noise reduction filter
• Advanced motion adaptive edge enhancing de‐interlacing engine
• 3:2 pull‐down support
• Programmable poly‐phase scalar for both horizontal and vertical dimension for zoom and windowing
• Programmable color management filter (to enhance blue, green, red, face and other colors)
• Chroma coring and black extension processing
• Dynamic Non‐Linear Luma filter
• Programmable color matrix pipeline
• Video mixer: 2 video planes and 2 graphics planes
Video Output• Programmable four channels high speed video DACs for analog video output (CVBS, S‐Video, YPbPr and VGA)
• HDMI 1.3 transmitter with integrated CEC processor
• Supports all standard SD/HD video output formats: 480i/p, 576i/p, 720p and 1080i/p
• ITU601/RGB888 digital output for interfacing to other video devices
Audio Decoding and Output• MediaCPU with DSP audio processing
• Capable of supporting software codecs like MPEG audio, Dolby Digital, MIDI, MP3, WMA, AAC and many
more
• Build‐in 2 channels audio DAC and i2s output for connecting to TV audio processor or scalar.
• SPDIF/IEC958 serial digital audio output
Digital Audio/Video Input Interfaces• ITU 601/656 video input with optional down‐scalar
• Dual channels i2s digital audio input
• Transport Stream (ISO13818‐1 TS packet format) SPI interface for DVB/ATSC‐type digital video
• Camera Input supported formats（8bit）：YUV422,RGB565,10bit rawRGB, 2bytes rawRGB
STB Interface
• Demux interface for connecting to external ATSC, DVB‐C, DVB‐T demodulator chip
• PWM, I2C and SPI interfaces to tuner and demodulator
• Integrated DVB Common Descrambler 1.0, DES, TDES and AES cryptographic engine; integrated hardware random number generator
• Integrated ISO 7816 smart card controller
• Android with built‐in support for all DTV table processing
Integrated Network Interfaces• IEEE 802.3 10/100 Ethernet controller (with RMII interface for external PHY+magnetics)
• SDIO controller for external WIFI modules
Integrated I/O Controllers and Interfaces• SD/MS card controller for external removable storage
• Dual USB 2.0 high‐speed USB ports: One USB Host port and one USB OTG port
• Serial ATA (SATA) 2.0 3Gbps port with AHCI software interface for connecting to hard disk drive. Also
capable of supporting eSATA interface standard.
• Multiple UART, IIC and SPI controllers
• Programmable remote control input circuitry
Switching Fabric and Memory Interfaces• Application based traffic optimization using internal QoS‐based switching fabrics
• Intelligent memory controller with DDR2 memory interface
• 32‐bits DDR2 SDRAM controller supporting up to 512MB DDR800 memory devices
• Built‐in SLC/MLC NAND FLASH controller with up to BCH16 algorithm
• Built‐in SPI NOR FLASH controller
System, Peripherals and Misc. Interfaces• Integrated general purpose timers, counters, DMA controllers
• Integrated RTC with battery backup option
• Integrated multiple channels 10‐bit SAR ADC
• Single 24 MHz crystal oscillator input
• Embedded debug interface using ICE/JTAG
• AMPOWER power management circuits supporting multiple sleep and suspend operating modes
• 372Balls LFBGA RoHS package
Technical Information PDF: http://download1079.mediafire.com/mti2h0y5vsng/sokn55508l13nwa/AML8726-M_QRM+V1.0-IDER.pdfMirror:
http://www.multiupload.com/U3KKJM3KYJI hope this can help about any technical information that is requested about the hardware.
